Research And Design Of Full-On Chip Linear Regulator

As the development of the SOC ( System on a chip) technology, more and more function modules are required to be integrated on a chip, including power management modules which are necessary for electronic system . Low-dropout voltage regulator (LDO) is very suitable for being integrated on system chip as power management function module, for its advantages of low dropout voltage and simple application circuit.Based on analysis of the design principles of Full-on chip LDO, this thesis proposed a Full-on chip LDO constituted by one stage of operate transconductance amplifier. The frequency compensation scheme and the transient response enhancement circuit are also presented. Since it can keep stable with only a 100pF output capacitor, the LDO is especially suitable for SOC integration.In addition, the principles and implementation of the bandgap reference, highly precise current bias, protection blocks and enable block are also introduced in this thesis.The Full-on chip LDO is designed in 1.5μm BCD (Bipolar-CMOS-DMOS) technology, and is simulated by the SpectreS of Cadence Cop. The simulation results show that the line and load regulation are 2.8mV/V and 22.8μV/mA respectively, while the overshoots are less than 38mV. The PSRR at 1kHz is -50db.