Low Dropout Linear Regulator With Fast Transient Response And High Power Supply Rejection Ratio

In recent years, with the development of information technology, portable electronic devices based on system-on-chip expands rapidly. Meanwhile, the size of process node of integrated circuit become smaller and smaller, increasing numbers of modules are integrated on chip, and processor speed coming to be faster and faster. Power management, as the foundation module of system on chip, become hot topics in the study of analog integrated circuit. Dc voltage regulator, the key partment of power management, can be divided into three categories: low dropout linear voltage regulator, switching regulator and charge pump.Low dropout linear voltage regulator plays an increasingly important role in modern integrated circuit design as its advantages of high power supply rejection ratio, low noise and low cost.In order to improve the reliability and sensitivity of ratio frequency receiver of system on-chip, this paper proposes an off-chip capacitance free low dropout linear voltage regulator with high transient response and high power supply rejection ratio based on Nuvoton 0.35?m CMOS technology. Firstly, designed an overshoot voltage cut down circuit to open a fast response pathways for the discharge of output node, and designing an undershoot voltage cut down circuit to open a fast response pathways for the gate capacitance of power tube to increase the discharge current. Secondly, designed an CMOS voltage reference source with pre-suppression circuit based on the characteristics of the domain value area, linear zone and saturated zone, obtained an reference voltage with low ripple to improve the power supply rejection ratio to a great extent. Finally, generating a controlled resistance by sampling power tube current, the controlled resistor and capacitor forms miller compensation, in series connection, to produce a zero changing by load. The zero location changes flow output poles to realize the zero pole tracking compensation. Undershoot produces a fixed zero to compensate the gate pole of power tube to realize the fixed zero compensation. With the loop compensation, not only improving the system stability within the total load scope, but also improving the unity-gain bandwidth, which further increases the transient response speed.Simulation results shows that the output voltage of low dropout linear voltage regulatoris 3.3 V. It comes into the normal working state as the power supply voltage is greater than3.51 V. Maximum load capacity is 100 mA. When the load current jumps up or down between1 mA and 100 m A in 1?s, the overshoot voltage is 40 mV and the undershoot voltage is 97.66 m V. Under the state of input voltage 4V, PSRR simulate result is-60 dB as load current equal to 100 mA and-86 dB as load current equal to 1m A; Under the state of input voltage 4.2V,PSRR simulate result is-69 dB as load current equal to 100 mA and-73 dB as load current equal to 1mA. The phase margin is greater than 60o within all load. With the pre-simulation down, this paper finished the layout and post-layout simulation. Pre-simulation result is simulate to post-layout simulation result, the layout network is send for fabrication. The simulation result shows that the transient enhance circuit and high power supply rejection ratio CMOS voltage reference source and loop compensation method can improve the transient response speed and power supply rejection ratio.