Research And Realization Of The Test Algorithm For Embedded Memory

With the increasing of the density and complexity of Integrated Circuits , the embedded memories have occupied more area on SoC(system on chip). Because of the high frequency, complexity and the high density of the transistors and layout,the physical defacts occuron the embedded memories easily. So an effective algorithm and test method are significant to the yield improvement and product cost saving.In this paper, Built-in Self-Test(BIST) has been adopted to design the mensurability of storage in the digital baseband chip. The first chapter introduced several designings of testable mensurability, compare their superiorities and confirmed their scope of application respectively. The second chapter anaylizered and expatiated the types of storage, the method of testing and the difficulty of testing. The third chapter design the mensurability of Built-in Self-Test(BIST) storage and synchronous dynamic random-access memory (SDRAM), it could test the storage as the normal running speed. The fourth chapter tested and validated the function of storage, and contrasted the result of inputting and outputting, In succession,the simulation indicated the designings were accurate, available and prompt. The experimentation testify the BIST could make a full speed testing by a lower recommendation of the experimental apparatus, thereby it could decrease the cost of testing, simplify the testing pocedure and improve testing efficiency remarkably.