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Study On Built-in Self-test Technology For Board-level Circuit

Posted on:2011-02-03Degree:MasterType:Thesis
Country:ChinaCandidate:L G HuangFull Text:PDF
GTID:2348330533968710Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
With the development of very large scale integrated circuits design,surfacemount technology,and multi-layer printed circuit board technology,the pins of chips become more and more dense,the outside pins of circuit boards less and less,resulting in estimating the complex internal structure of the circuit from limited pins,which makes the test cost more and more expensive.For this problem,built-in selftest(BIST)provides a solution.Built-in self-test is a way of test that specifies test as one of the system functions,which makes the system have the ability to dectect and diagnose itself.It can solve the problem caused by the circuit nodes' weakened physical accessibility,because of its built-in feature.And it can effectively improve fault coverage.Therefore,the study on built-in self-test has important practical significance.The paper studies on built-in self-test respectively for digital and analog circuits.The major completed work and the achievenents are as follows.Firstly,boundary-scan built-in self-test is proposed for digital circuits with microprocessor and boundary-scan chips,in which the boundary-scan test technology is used in built-in self-test.Based on the structure,internal function test and external interconnect test process are studied.After analyzing the advantages and deficiencies of traditional test generation and diagnosis algorithm for wiring interconnects,an improved test algorithm called Equal-Weight & Min-Distance Algorithm is proposed,which achieves a good trade-off between test compactness and diagnosability.Secondly,according to the fact that more and more analog circuits are mixed with digital circuits,an analog built-in self-test structure is presented.In addition,testability analysis based on DES(Descrete Event System)model for built-in selftest structure is studied.In the study,an improved algorithm in which dichotomy is applied to obtain minimal test event sets is presented,and suggest a way to get the infimal partition of the fault space.In fault diagnosis,DES theory is used with fault dictionary method,which facilitates fault diagnosis program writing.Finally,a built-in self-test physical system is built to study and validate the built-in self-test technologies in the paper.Experimental results show that they can quickly and correctly detect and diagnose the simulated circuit faults,have strong feasibility and practical value.
Keywords/Search Tags:Built-in Self-Test, Boundary-Scan Test, Analog Built-in Self Test, Discrete Event System
PDF Full Text Request
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