Font Size: a A A

Research On Embedded Memory Built-in Self-test And Built-in Self-repair

Posted on:2009-02-06Degree:MasterType:Thesis
Country:ChinaCandidate:L WangFull Text:PDF
GTID:2178360272977074Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
Embedded memories have been widely applied to the field of system-on-chip (SoC), because there are many advantages regarding embedded memories, e.g., high bandwidth, low consumption and low silicon area overhead, etc. Embedded memories will occupy the largest portion of a SoC (approaching 94% by 2014). Because the system with embedded memories requires high reliability, the techniques of embedded memory self-test and self-repair have significance and practical value.In this paper, at the beginning, researching background, meanings and rationale of embedded memory, memory built-in self-test (MBIST) and memory built-in self-repair (MBISR) were introduced. The current internal and external researching status and developing prospect of this subject were summarized. Then the process of design a memory built-in self-repair circuits were expatiated and one repair strategy based on one dimension redundancy blocks was improved. Without extra redundancy memory resources, improved repair strategy can improve memory repair rate (i.e., the number of repaired memories to the number of defective memories). The results of experiment on a 16×32 bits SRAM BISR circuits proved that the new repair strategy was feasible and achieved a high repair rate. Lastly, the techniques of designing an address generator base on line feedback shift register (LFSR) were improved.The SRAM built-in self-test circuits based on improved line feedback shift register (LFSR) and March MSL test algorithm were achieved. The experimental results showed that they had the advantages of high work frequency, low area overhead, strong reusability and so on.The whole proposed MBIST and MBISR circuits were described by VHSIC Hardware Description Language (VHDL). They were synthesized, placed and routed by the synthesis tool XST of Xilinx ISE. The simulations were done by Xilinx ISE ordering ModelSim SE6.0a software. The whole designed circuits were verified through Vitex2 FPGA family of Xilinx.
Keywords/Search Tags:embedded memory, row block, SRAM, line feedback shift register (LFSR), self-test, self-repair, repair strategy
PDF Full Text Request
Related items