A 10Bit 100MHz CMOS Current Steering DAC In 65nm

after consulting a lot of Current Steering DAC literature, studying systematically about the Current Steering DAC principle of operation,error source and DAC developing situation, this paper carries out a CMOS Current Steering DAC of 10 bits, and the working frequency is 100MHz. This CMOS Current Steering DAC design is based on SMIC 65nm low leakage 1P9M process. In this design, it adopt the 5+5 segmented structure and the scheme that using binary structure in the low 5 bit and thermometer structure in the high 5 bit. This scheme has the advantage of both binary structure and thermometer structure.In the circuit design, there is 1.2v power supply in the digital part, and 2.5v power supply in the analog part to reduce the noise of digital part and the noisy effect in analog part. The thermometer decoder adopts ranks of decoding to simplify the decoder. In the biasing units, it uses low voltage bandgap structure to increase the voltage margin. In the current source unit, it not only uses cascode structure to increases the output impedance and improves the accuracy of current source, but also add the Dummy to restrain the clock feedthrough and charge injection effect. In addition, it meticulously designs the buffer so that the delay of different data path are almost the same.In the post-layout design, it uses 4 layer metal placement and routing. It separates the digital power, analog power, digital ground and analog power, adds coupling capacitances between digital power and digital ground, analog power and analog ground to reduce the effect to analog parts caused by noise in digital parts. It studies the matching problem of layout in detail in order to maximumly reduce the effect caused by process deviation. In order to restrain the symmetry error causes by temperature and the grads error causes by interconnect error, it uses Hierarchical symmetrical layoutAfter tape-out, it tests the chip by double powers, digital power of 1.2v and analog power of 2.5v.The working frequency is 100MHz, the DNL error is 0.3LSB, the INL error is 1.4LSB. The maximum output current is 34.197mA, and the chip area is 395x314um.