.8-bit The 100msps Current-steering Cmos Dac And Its Typical Unit Circuit Design

Nowadays DAC has been the one of problems,which restricts the development of the computer, communication and DSP. It has been a key, which solves the speed and precision of signal processing. So this paper presented the design of an 8-bit 100MSPS DAC. In this paper, the basic theory and architecture of DAC is discussed. After compared with many structures of DAC, the segmented architecture of current_steering DAC is adopted. The 5 MSBS are thermometer code weighed and the 3LSBS are binary_weighted. Several typical unit circuits of DAC are designed and their simulation results are also presented. A high precision CMOS bandgap voltage reference circuit is described. HSPICE simulation shows that the average drift of the circuit is 11ppm/oC from 0oC to 100oC and 0.22mV/V with supply voltages from 3 V to 3.6 V. A high swing and high resistance current mirror bias circuit is presented. And the current switches and control signal circuit are also discussed. The thermometer-coded decoder is described in details. In the design, MODELSIM and Design Compiler are employed to make it satisfy the high speed requirement of DAC. The all circuits of DAC have been simulated in UMC 0.35μm CMOS standard process model by HSPICE. At last, the typical unit circuits fulfill the requirements of 8-bit 100MSPS CMOS current_steering DAC.