The Signal Integrity Design Based On Cadence And The Application In Embedded System

With the continuous development of electronic design, Signal is becoming more quickly,. Equipment is becoming smaller, Signal integrity situation has become more and more prominent, At the same time, the use of embedded systems become more widespread the original. For its high-speed, low power, low-cost, powerful, and many other excellent properties, embedded systems has become the mobile communications, multimedia digital consumer and other embedded solutions of choice for processor. Therefore, the embedded system signal integrity becomes more and more prominent. Signal integrity analysis applications has become a effective way to solve the problem in high-speed system design. In this paper,With powerful simulation software cadence, had signal integrity simulation analysis to High-speed signal lines before wiring layout. Then Formulate binding rules through the formulation results, to reduce the impact of the Signal integrity. Practice has proved that signal integrity could short the design cycle. It had good theoretical and practical significance.This paper first introduces the signal integrity of the situation and some of its theoretical foundation. Then use Cadence tools to analyze signal integrity of several major phenomenon, Through the simulation, analyze the causes of the phenomenon and come to a solution. At the same time introduce an embedded Multimedia Terminal System, describe the system functions and modules. The article shows how to use the Cadence tools to analyze the causes of the signal integrity phenomenon. Finally, have a deep analyze with the signal integrity phenomenon in the key network, for example, system timing, reflection, crosstalk and have a design with the Specctraquest. Achieved the desired objectives with first silicon success of the plate making.in this design, I made a new way to the multi-terminal topology design in the source-synchronous clock system. I also forward the scope of the 3W in the crosstalk design.With the use of EDA tools, Designed constraint rules to meet the requirements of the wiring and PCB layout. System performance of the PCB board is stable and reliable, the system is working correctly. Through the research of this article, I Shorten the development cycle, reduced costs. Further show that the signal integrity analysis of high-speed PCB design is important to the embedded system.