Application Of Signal Integrity In High - Speed PCB Design

With the quickly development of the integrated circuit, the performance of the electronic products in all aspects has been get an unprecedented increasing, so high-speed PCB design has become a key factor in product performance and stability. In high-speed PCB design process, from stackup setting, PCB layout and PCB routing, all of these processes may cause signal integrity issues, in the paper, signal integrity also was involved in the mainboard design process, such as timing controlling reflection from the impedence unmatching, crosstalk and SSN issue. To resolve this issue, special project way and measures are talken based on signal integrity issue, then get a better result.Based on the length matching requirements, every group has been controled within15mil tolerance, it meet the needs for timing exactly. At the same time, signal length and clock length should be within500mils to1500mils, actually we control it within1250mils to1450mils. The result is1333MHz CPU can work correctly. Also host clock, DDR Clock, DDR command and DMI impedence have been controlled within3%to6%, and differential impedence has been controlled within2%to9%. This follows the Intel’s requirements about15%to20%. Based on the reflection and crosstalk analysis, we still find the noise, so we begin to chect the SSN influence, the fact we add three0.1uF capacitor, the noise disappear from the simulation wave. Finally, by the actual test. The motherboard performance is awesome. Meanwhile, all of this work will be helpful with the future design and research.