Research On Signal Integrity Of Memory High-speed Interface Circuit

As the key to data storage and transmission,the memory data rate is getting higher.At the same time,the interconnect structure is becoming more complex,which causes many signal integrity problems to the design of high-speed interface circuits.This thesis studies some signal integrity problems from three aspects: basic principle analysis,model construction and simulation.Including the following points:First of all,model and simulate the transmission line on the PCB.By using ADS software,through the substrate design and the settings of the PCB board material parameters,the 10 in transmission line and the 50? characteristic impedance is simulated and analyzed.The width of single-ended transmission line is 11.7729 mil,and about the differential transmission line,the width is 10 mil,the line spacing is 13.1263 mil.For the reflection,after the simulation of multiple termination methods,the Thevenin's termination method is finally adopted to reduce the reflection.The crosstalk of the transmission line is simulated from coupling length,coupling distance and the signal rise time.The results show that at the length of 10 in,the NEXT is 42 m V,and the FEXT is 63 m V.Meanwhile,the saturation length is 3.2in when the NEXT reaches the maximum value,and the FEXT is 25 m V at this time.For the loss of transmission line,through the simulation of the S-parameter,the attenuation of the differential signal is-11.6 d B at the frequency of 5GHz,the eye diagram is basically closed,and the signal quality is poor.So for the attenuation of the signal,an analog equalization circuit is designed to compensate the high frequency component of the signal.Through the simulation,the high-frequency gain bandwidth is 5.17 GHz,the gain compensation range is 10.71 d B~15.71 d B@5GHz,and the eye height of the eye diagram is 0.85 UI,the jitter is 5ps,and the signal quality is good.Second,for the discontinuity of the transmission line,the simulation and analysis include two aspects: corner and via.The results show that no matter what kind of corner structure is adopted,the discontinuity of impedance will be caused by the change of line width at the corner.At the same time,the presence of via also has an influence on the impedance,therefore,in the actual PCB board layout design,the use of vias should be minimized.