Study On Signal Integrity Of USB3.0 Data Transmission System

As the signal transmission speed of the electronics is improving faster, the signal integrity problem has become a more crucial problem for restricting the equipment performance. Handling the signal integrity knowledge has become an essential skill for the hardware design engineers. Yet there has not been a mature design idea or flow for the engineers to merge the signal integrity knowledge into hardware design progress. Under this background, basing on the USB3.0 high speed data transforming system, this article studied on the crosstalk, reflection and power integrity problem in the high speed circuits. The main contents include:1. As the classic MTL crosstalk model is established under the common-mode source,ignoring the differential-mode source,this article proposed a differential-mode source crosstalk model. Studied the crosstalk solving method in frequency domain and time domain,using the chain parameter method and FDTD method respectively. This is the core innovation point of this article. The main work includes establishing the electronic model of the new crosstalk transmission line model, calculating the parasitic parameter by the method of image,calculating the crosstalk in frequency domain using chain method and terminal boundary conditions, calculating the crosstalk in time domain using FDTD method.2. Basing on the USB3.0 real chip property, this article studied the reflection of the system by theoretical analysis and simulating design. The simulation result is used to guide the PCB design. The main work includes studying the root of the reflection problem and the influence of the discrete current return path to the differential transmission line reflection in the high speed PCB design, including the influences of the discrete power cut-off line and the holes in the PCB. This article also studied the influence of the FPGA OCT and the DDR2 ODT terminations to the reflection problem, offering a guide line to the real high speed circuit design.3. Basing on the power distribution network of the USB3.0 high speed system, this article proposed a periodical power integrity design scheme, giving a method of solving multilayer PCB target impedance, and finished the decoupling net configuration. The main work includes studying the root of the power integrity problem and the decoupling mechanism of the decoupling capacitors, confirming the resonant frequency of the multilayer PCB. Basically, the design completed choosing the types and the numbers of the decoupling capacitors. Giving a theoretical guideline to the target impedance design.