Study Of Sample-and-hold Circuit Based On Pipeline ADC

In recent years, the technology of integrated circuit has gained great progress; analog to digital converter is developing towards high-speed and high-precision. Sample and hold circuit is an indispensable important circuit block, which almost determines the performance of the whole A/D converter. Based on this requirements, a 10bit 150Msps Sample-and-Hold (S/H) circuit is designed, while the important cells of S/H circuit are studied in detail, including sampling-switches,clock-control circuit,sample-and-hold amplifier.Firstly, based on the investigation and reading of a large number of literatures, the current development of A/D converter at home and abroad is analyzed in detail, especially the research and development of S/H circuit at home is introduced at length.Secondly, based on the detailed analysis of the operation of sample-and-hold circuit, several blocks of sampling switch clock-control circuit sample-and-hold amplifier are designed. The bottom plate sampling technology,dummy switch and a clock-control circuit is designed to improve the performance of S/H, and some architectures of amplifier are compared and analyzed in detail.The whole design is based on IBM 0.13μm mixed signal process and simulated with Cadence. The dc gain of the amplifier is 65dB; the setup time of the sampling -switch is less than 0.3ns; setup time of the S/H circuit is 3ns with 10 bit resolution. The layout of the S/H circuit is designed at last.