Sigma-delta Modulator-based Fractional-N Frequency Synthesizer

Because of the rapid development of the wireless communication technology, the design and research of the integrated circuits in the related field has gained more and more attention in recent years. With the advance of the CMOS process technology and the descend of it's cost, it is a trend that CMOS process will dominant in the fields of radio frequency(RF)and microwave. If radio frequency circuits are designed and manufactured using CMOS process, it is possible to integrate the RF analog part and baseband digital part in one chip. This is very attractive, and also in conformity with the development tendency of silicon on a chip (SOC).In this work, we study and research a methodology of designing a frequency synthesizer, which is one of the most important building blocks of the transceiver front-end, and is used to generate local oscillation signals.The frequency synthesizer is a mixed-signal system which contains analog and digital circuits. We can get a set of designing methods and process through the design of the sigma-delta modulator-based fractional-N frequency synthesizer. Especially, the design of Phase-locked Loop (PLL) is helpful for us to deeply understand the negative-feedback system and its theories. In the design of sigma-delta modulator-based fractional-N frequency synthesizer, there is a key point that is the closely relationship between the loop parameter and the phase noise characteristic. So it is suggested that when we design the circuit, we must base on the analysis of system loop parameters. We begin with a system analysis of a typeⅡfourth-order charge-pump PLL-based frequency synthesizer, and deeply research the noise characteristics of it, and provide a set of system models for the analyzing of system parameter and noise characteristics. And the method for modeling and simulation of the sigma-delta modulator is also provided. We can find the main factors that influence the noise characteristics of the system, and how to promote the noise characteristics of the system through the analysis of these models. This dissertation is also a good reference for the future works. All the design and simulation is based on the Hspice model of TSMC0.25um 2.5V CMOS RFprocess.