Design Of Fractional Frequency-division Phase-locked Loop

In recent years, with the development of electronic information industry, andits widening applications, People improve their requirement on Phase-LockedLoop, which play an important role in integrated circuit. SimultaneouslyFractional phase-locked loop is widely used because of high resolution. So thistopic is worthy of researching.After learning the basic theory of phase-locked loop, this paper analyzes theworks of various parts of Integer/Fractional phase-locked loop, describes the wayof designing every parts of it.Overall this paper designed a Integer/Fractional phase-locked loop circuit witha signal of62MHz as input and a variable frequency signal about1.2GHz asoutput. Even more, this paper describes the different types of the phase detector,charge pump, Vlotage-controlled oscillator, divider and modulator, also tells thedetails about their theory. The phase detector has a structure with two D flip-flop;In this design,the circuit of charge pump contains a part of common-modenegative feedback, and it use a unity gain operational amplifier to eliminate thephenomenon of charge sharing; LC_VCO is used to improve the performance ofphase-noise; the Fractional divider consists of two parts, one of them ismulti-modulus divider, it is cascaded from some same modules which is2or3dual modulus prescaler. Another part is a single-loop sigma-delta modulator with3-order. This paper also designs the layout of each module.The design and simulation of the whole circuit of Integer/Fractionalphase-locked loop is in the platform of Cadence, I built the circuit with SMIC0.18um CMOS process. According to the result of the simulation, the system canwork as a phase-locked loop, and indicators can meet the requirements. However,this design need to optimize, and it is still worth to study further.