Font Size: a A A

Interface Design Of CPCI Bus And Multi-DSP Based On FPGA

Posted on:2010-01-29Degree:MasterType:Thesis
Country:ChinaCandidate:H M GongFull Text:PDF
GTID:2178360272982685Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the development of radar technology, the signal process amount of the new generation radar increases, the regeneration of the system speeds up and the development cycle shortens. For the above reasons, it is an inevitable trend to develop reconfigurable and scalable common signal process system, and adapt to the change of process scale. Radar signal processor will be modulated, standardized and generalized. Various signal process methods and complex algorithms will be realized through flexible software programming and hardware expansion.A common multi-DSP radar signal process platform based on the CompactPCI bus is presented. The platform adopts standard 6U board and CompactPCI-bus and can flexibly connect with the IPC and meets the versatility and scalability requirement of the radar. Besides that, the multi-DSP system can real-time process the signal massively and quickly, and satisfies the large amount of signal process requirement.The interface design based on CompactPCI bus and multi-DSP is the key point to generalize the system. Thus, the interface design of multi-DSP and CPCI bus with FPGA and bridge chip PCI9656 is described in detail.
Keywords/Search Tags:PCI9656, FPGA, DSP, CPCI, BUS
PDF Full Text Request
Related items