Design And Research Of Integer-N Frequency Synthesizer For UHF RFID Reader

Driven by the progress of CMOS RF technology and the enormous market of UHF RFID, the research and development of Reader and Tag have grown explosively. The direct down conversion receiver is adopted in wireless communication system because of its competitive integration. Meanwhile, more rigorous requirements is put forward in one of its key block—Frequency Synthesizer.According to the characteristic of direct down conversion receiver and EPC global communication standard, the specification of phase noise and frequency range are concluded, which are -107dBc/Hz@200KHz and 860MHz~960MHz respectively. After analyzing frequency synthesizer model, loop stability and noise characteristic, each loop parameter is calculated properly. According to loop parameter, the circuits and layout are designed, then, post-simulation is carried out to verify the feasibility.Characteristic works in the dissertation are summarized as follows:1. The regulator and balanced filter technology are used in LC VCO (Voltage Controlled Oscillator) to optimize the phase noise in 1/f region.2. The ring injection locked prescaler is innovatively designed to inherit the good phase noise performance of LC VCO and the frequency range as well as get the I/Q outputs from differential inputs.3. The basic cell for programmable divider is TSPC (True Single Phase Clock), which has simple structure and nearly doesn't consume power in static state. The phase frequency detector (PFD) and charge pump circuit are designed for no dead zone.4. According to the character of Mixed-Signal circuits, the layout is designed and post-simulation is carried out. The frequency synthesizer is design in TSMC 0.25um RF/MM 1P5M CMOS technology. The test plan is put forward finally.