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Key Technology Research Based On The Phase-Locked Loop Frequency Synthesizer

Posted on:2014-02-11Degree:MasterType:Thesis
Country:ChinaCandidate:L ZhaoFull Text:PDF
GTID:2248330395483864Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
The phase-locked loop (PLL) frequency synthesizer is widely used in the field of wirelesscommunications. This article introduces the basic structure, working principle and noise theory ofPLL, based on which the primary function modules and the key technologies of PLL are researched.The oscillator is an important component in the frequency synthesizer. Firstly, this dissertationdescribes the basic working principle of the oscillator, and the structure of the three-point oscillatorcircuit and cross-coupled oscillator are introduced and discussed. The related theory of phase noiseis analyzed and the key methods of optimizing the phase noise are presented. At last,a low noisequartz crystal oscillator is designed based on SMIC0.13μm CMOS technology. The oscillator usesthe voltage negative feedback to control the amplitude, while using capacitor filter technique forphase noise optimization. A voltage controlled oscillator is presented, which adopts switchedcapacitor array and some kinds of noise optimization techniques. Simulation results show that thecenter frequency of the quartz crystal oscillator is33MHz while phase noise is-159dBc/Hz at1MHz, and the power consumption is about1mW under the supply voltage1.2V; the centerfrequency of voltage-controlled oscillator is2.4GHz, and the adjustable frequency range is from2.213GHz to2.973GHz. The phase noise is-112dBc/Hz at1MHz, and the power consumption isabout2.5mW under the supply voltage1.8V. Finally the high-speed divider is researched. Thecomparative analysis of the structure and performance of two kinds of high-speed frequency divider,true single phase clocked and current mode logic circuit. Then, based on SMIC0.13μm CMOStechnology, two Current Mode Logic high-speed divider with different load are designed, of whichthe work frequency range is relatively wide and the phase noise is very low.Simulation results showthat the designed divider can work properly with input frequency range from2GHz to4.2GHz, andthe phase noise is-139.7dBc/Hz at1MHz. The power consumption is less than1.8mW under thesupply voltage1.2V.
Keywords/Search Tags:Frequency synthesizer, Crystal oscillator, Voltage Controlled Oscillator, High-speeddivider
PDF Full Text Request
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