Broadband Based On FPGA Implementation Of Digital Down - Converter

With the theory getting more matured and completed, software radio (SR) technology has been widely used in radar communication system as well as other civil and military.Digital down converter (DDC) converts digitized IF data into filtered base band data which can be processed by a standard digital signal processor (DSP) microprocessor. It works after the analog-digital conversion and prior to the latter process to the input digital signal. It is the core part of SR and the key factor of the performance. Only by DDC, the data processing work which used to be handled by hardware can be done by software.Wideband signal generally sample analog signals at intermediate or radio frequency. It is a challenge for latter digital processing and whole system control. Therefore, we need to improve the structure of DDC, so that the DDC to the high-speed data streams after sampling can be implemented in the FPGA.In this dissertation, the method to design and realize the DDC in the field programmable gate array (FPGA) has been discussed. And promotes an improved structure base on a parameters required wideband digital down converter; this improved structure does not require parameters, and adaptable to different environment.The main contents of this thesis include:1. Introducing basic theory and architecture of DDC and summarizing various key algorithms such as CORDIC, polyphase filter, DA, etc.2. Based on traditional structure of DDC, two kinds of wideband DDC structures are analyzed and their performances are compared, and the feasibility has been verified through computer simulation. DA is applied in the design of FIR filter. The parallel/serial structures are used to improve speed and reduce resource consumption in FPGA and CORDIC is applied in the design of NCO is improved too.3. Completing system debugging in the existing hardware platform of the DDC systems. The experimental results show that the designed DDC system is correct and effective.