Design Of A 2.4GHz Frequency Synthesizer In TSMC 0.25um Technology

The rapidly growing wireless communication market creates an increasing demand for highly integrated RF transceivers of lower power consumption and smaller die sizes.The frequency synthesizer,which is usually formed by a Phase-Locked Loop(PLL),is a major and critical component of a wireless transceiver because it operates at high frequency and consumes a very large portion of the total power consumption in the transceiver.The performance in power consumption and operating speed of a frequency synthesizer are limited by the two most important building blocks,namely the frequency divider and voltage-controlled oscillator(VCO).The objective of this paper is to design a 2.4GHz fully integrated frequency synthesizers based on TSMC 0.251am CMOS technology.A NP-core cross-coupled VCO structure is used to provide differential output,which has a good noise performance and a low power cost.A Pulse swallow integer frequency divider is adopted here to provide a programmable output.The 31/32 dual-modulus prescaler is designed using imbalanced phase-switching technique to improve operating frequency and save power.Two programmable counter use the same structure to improve output frequency range.In the loop filter design,a capacitance multiplier is used to reduce the silicon area.The frequency synthesizer is simulated with Cadence speetreRf under a 2.5V power supply.The simulation results show that the settling time of the proposed PLL is less than 50μs,and the output frequency range of VCO is from 4737MHz to 5424MHz.After a divide-by-2 circuit,four phase I/Q signals are generated with the frequencies range from 2380MHz to 2710MHz,which can fulfill the needs of Bluetooth communication standard.