Study Of A New Project Of Realizing Fractional Frequency Based On ∑-△ Modulation

Over the last few decades, as fast development in electronic and communicational science and technology, the practical use in this field has been promoted faster and faster. Signal generator, which can be called the heart of electronic system, has powerful effect on the whole electronic system .It has been a hot question on how to produce a signal generator of low cost, high performance and high stability. That is the technology of frequency synthesize. The performance and cost of the signal generator are directly influenced by the design method of the frequency synthesizer. So it is still a big challenge for the designer to accomplish it in a proper way. Recent years, the fast developing technology of the phase-locked frequency synthesizer has been being one of the main design methods of the signal generator by its superiority.Phase-locked loop (PLL) is negative feedback self-driven circuit. The application of the PLL is not just the frequency synthesizer. Why we choose PLL as a proper method is because of its advantages relative to other frequency synthesize methods. The PLL frequency synthesizer has a very broad frequency range and in so broad a frequency range, it can produce a series of frequency points with the same high precision and stabilization as reference frequency. Fractional– N technology resolves the contradiction between frequency resolution and switching time in PLL synthesizer, but result in severe phase noise. Traditional method of phase compensation needs high performance of digital component such as A/D, and has time delay, so it is difficult to achieve.Σ-Δmodulator has plastic function to noise, result multilevelΣ-Δmodulator used in fractional- N synthesizer can resolve the problem of phase noise, and accelerate the development and using of Fractional- N synthesizer.This thesis focuses on the discussion of realization of fractional-N synthesize scheme. This thesis indicates the problem appeared using traditional technology of devouring pulse when heightening the phase comparison frequency, it is that the higher phase comparison frequency means the lower the frequency division ratio. It can't get lower frequency division ratio using technology of devouring pulse when very low modulus Changing-modulus frequency divider is not available. Therefore advancing a new project based on frequency division of changing modulus: realizing high phase comparison frequency decimal frequency division ofΣ-Δmodulation through changing the modulus of the frequency divider according to some rules. A favorable result of frequency is gained after experiment of the measure of decimal frequency output.