Design Of A Embedded ADC IP Core In SoC System

Analog to Digital Converter (ADC) is the interface of analog and digital circuit, its use is very extensive. Because of SoC systematic requisition for performance, such as high performance, low consumption, low cost, etc., ADC and other analog circuit IPs are combined with MCU, which has already been the trend of the times to form one SoC. To embedded application, develop an ADC IP core compatible with digital technology is the key to integrate ADC into a SoC.In this thesis, a technique to design an ADC IP core in SoC used for touch panel is introduced. According to Top-Down design method, the design is finished in term of four stages, including system design, circuit block design, performance simulation and layout design. Based on the analysis of touch panel signal sampling and other auxiliary application, a successive-approximation ADC structure is adopted and the performance specifications are defined. Key optimization design and realizing each circuit block, not only has guaranteed the performance of the circuit, and has reduced the area of the chip effectively. A self-calibrate comparator is being used to improve the precision of ADC; using the circuit structure of the unique clock phase place, the clock frequency can be changed by setting parameters, thereby, changing the sampling frequency and converting precision. Digital structure that we design can deal with all measure result without MCU. The IP core has been implemented in SMIC 0.18um MPW technology with full custom technique. Each performance parameter of the ADC is simulated and analyzed with the mixed-signal co-simulation strategy.The overhead of the analog part is only about 0.43mm~2, and the sample precision can be as high as 10Bit. When used in 10 bits precision, the SNR is 58.9B;the average power is 6mW;the DNL is less than 0.9LSB. So the ADC IP core can be perfectly satisfied with the requirement in SoC system.