Design Of 8-bit 60MS/s Folding And Interpolating ADC

As the interface between the analog system and digital system, ADC (Analog to Digital Converter) becomes more and more important in system design with the development of electronics and digital computer technology. A 60Msample/s, 8-bit, folding and interpolating ADC is studied and designed in this thesis.Several kinds of ADC system and their characteristics are studied in this thesis. In order to meet the requirements of the speed, resolution and power dissipation of ADC, a folding and interpolating structure is employed in the system design. The high five-bit adopts folding and interpolating structure to convert analog to digital which is designed on the basis of Gilbert Cell;while the low three-bit uses flash structure in which a current-switching bipolar comparator is employed to achieve high speed. The two units are converted at the same time, so the period of conversion is reduced. Also, a fast open-loop S/H circuit is introduced to increase the sampling speed. The design of a linear temperature compensation voltage bandgap reference is based on the traditional bandgap. In the whole circuit, using fully differential structure, the charge injection effect is decreased;common-mode noise is suppressed due to supply transients and substrate coupling;the input dynamic range is increased.All circuits are designed in 0.6 μ m BiCMOS technology and simulated in spectre at 5V supply voltage. The results of simulation indicate these cell circuits can meet the requirements of the system, and the ADC can achieve 8-bit resolution when the sample rate is 60Msps.