Design Of Low Power RF CMOS Low Noise Amplifier

Due to the rapid advance in science and technology, the wireless communication system has potently shortened the connectivity among people. In terms of operating frequency, the wireless communication systems can be divided into three main blocks: radio frequency band (RF), intermediate frequency band (IF), and Base Band, respectively. In general, the circuits operating at IF and Base Band are fabricated and designed in digital by CMOS process, but those of RF must be fabricated and designed in analog by GaAs Process. Besides, for impedance matching, the circuit leads inductors in design, but inductors are not appropriate to be used in CMOS process because the loss of substrate of CMOS process inherently is considerable and thus quality factor of inductor is low, and the Spice models form different foundries are different. So the accurate Spice models of active and passive components are very important in design.To integrate the three blocks, the cost of manufacture, power consumption, and chip size are reduced. Besides, the systems made by the same CMOS process facilitate to modify and integrate other digital systems. It makes mobile phone, personal digital assistant, and notebook more compact and portable. Thus it speeds the production and affects the PC and relative industries very deeply. So accompanied with that the market of wireless communication systems is dramatically growing, the research of RF ICs is very hot.The dramatic progress of CMOS process technology has gradually evidenced its applications in RF front-end circuits. CMOS process possesses the advantage of low cost and highly integration. In recent years, the rapid development of wireless radio systems leads to an increasing demand of low power, low lost, high performance, high integration communication RFIC's. So, we designed a low noise amplifier (LNA) for 1GHz RF front-end receiver.In this thesis, a fully integrated low-power lGHz CMOS RF front-end receivers have been designed with TSMC 0.18um CMOS technology. A CMOS RF receiver need a high performance low noise amplifier. Be the role of first stage, the performance of LNA is more important. A low noise amplifier using a gate inductor and a source degeneration inductor for input matching and with cascade topology is discussed. Then we introduced a mid inductor to the classic circuit topology to improve the linearity and voltage gain. And using the technology of optimizing the noise of a circuit under the fixed power, we obtained a compromised result of power consumption and noise figure.Our circuit is simulated by the EDA tools-Spectre. The pre-simulation result is as follows: the noise figure is 1.5dB, the voltage gain is 32dB and the power consumption is 9mW. The post-simulation result is as follows: the noise figure is 1.7dB, the voltage gain is 24dB and the power consumption is 11.5mW. Then we analyze the difference between the results of pre-simulation and pos-simulation, and give some useful rules for such designs.