Design Of Ternary Clocked Transmission Gate Adiabatic Logic Circuit

Multi-valued logic circuits have srong signal carrying capacity of single lines, which offer a valid solution for the problems brought by processing speed and the increasing area occupied by interactions in ICs. Meanwhile, the adiabatic circuits with energy recovery characteristics can reduce the power consumption greatly. By researching the working principle and characteristics of multi-valued circuit and adiabatic circuit, the design of ternary clocked transmission gate adiabatic logic cell circuit, ternary adiabatic logic gate circuits, ternary adiabatic combinational circuits and ternary adiabatic sequential circuits are proposed in this paper by using the theory of three essential circuit elements (3ECE), which realizing high information density and low power consumption for the circuits. The main contents of this paper are shown as follows:1,The theory of three essential circuit elements was investigated and as the guidance to design Double Power-clock Ternary Clocked Transmission Gate Adiabatic Logic (DTCTGAL) circuit, and the ternary adiabatic logic gate circuits were designed further.2,Design of ternary adiabatic basic combinational circuit based on 3ECE: Taking 3ECE as guidance, the function expressions of ternary adiabatic literal circuits and 3-1 multiplexer were derived, and the ternary adiabatic T-operation circuit and comparator were realized further.3,Design of ternary adiabatic arithmetic circuit based on 3ECE: According to the design ideas of DTCTGAL circuit and 3ECE, the one bit ternary adiabatic full-adder and ternary adiabatic full-multiplier were designed based on transistor level, and then based on these circuits, the ternary adiabatic basic arithmetic circuits such as four bits ternary adiabatic adder and ternary adiabatic multiplier were proposed further.4,Design of ternary adiabatic counter based on 3ECE: By analyzing the working principle and structure of multi-valued counters and according to the design ideas of DTCTGAL circuits, all parts of the ternary adiabatic counter were designed respectively by using 3ECE, and the four bits ternary adiabatic counter were realized further.The computer simulation results indicate that the designed circuits have correct function, and compared to that of same function circuits based on traditional CMOS and ternary DPL (Double Ppass-transistor Logic) circuits, the proposed circuits have remarkable low power characteristics.