General Logic Units Design Based On RTD And Its Application

The integrated circuit industry keeps the exponential increase according to Moore's Law for the last 40 years. Now, it has accounted a large proportion in the modern economy. However, with process scaling, complementary metal-oxide semiconductor (CMOS) technology will face some fundamental physics limitations, such as heat dissipation problem, short-channel effects, quantum tunneling and so on. On the other hand, nanoelectronic devices, which include single electron transistor, resonant tunneling diode, quantum dot, and so on, will become an important technique in post-CMOS period.The resonant tunneling diode is nowadays considered the most mature type of quantum device and already operates at room temperature and has aⅢ-Ⅴlarge scale integration process. It has been widely used in high speed and low-power circuits because of its high-speed switching capability, negative differential resistance (NDR) and self-latching. Meanwhile, RTD is suitable for implementing general logic uints which can be used as the basic module of very large-scale integration. To take full advantage of RTD, efficient design methodologies for RTD universal logic units become essential.In this thesis, we first introduce the spectral technology to distinguish between threshold functions and non-threshold functions. Based on spectral coefficient classification and Monostable-Bistable Transition Logic Element (MOBILE), a three-variable characteristic threshold logic gate (CTLG) and a three-variable universal threshold logic gate (UTLG) are proposed to implement all three-input threshold functions. The CTLG has simple structure and consistent input weights. A UTLG can implement all the threshold functions of three variables through reconfiguring the input bits. Based on three-input UTLG, a novel three-variable logic function synthesis algorithm is presneted, by which three-varibable functions can be decomposed to the OR of some threshold functions and realized using UTLG network. If the number of variable is more than three, some existing synthesis tools can be used to extract the three-input functions.In the thesis, a new RTD universial logic element—programmable logic gate (RTD-PLG) is proposed, which has simple structure, negative weight inputs and adjustable threshold. We also present a three-layer threshold netowork and logic function synthesis algorithm based on RTD-PLGs to implement n-variable Boolean logic functions. The proposed circuits with simple structure have fixed logic level and use fewer elements.Adder is the core element of complex arithmetic circuits and affects the overall performance of systems. In this thesis, a new RTD 1-bit full adder gate structure have been presented, which is composed of three logic modules. Four full adders have been constructed using the different designs of each module. Meanwhile, these full adders are evaluated in the designs of various word length pipelined ripple carry adders (RCA). From the simulation results, the proposed FA_GG have exhibited the best performance in terms of power consumption than other conventional designs, which reduces 15.7%-36.2% in 1-bit full adder and 5.5%-13.1% in 8-bit RCA.In addition, we extend the concept to the design of multi-valued RTD circuits, and analyse the operation principle of multiple-valued monostable-to-multi stable transition logic element (MMLE). Based on different configuration of MMLE, three new operations, 0-Base,1-Base and 2-Base operation, are presented to explain the operational principle of MMLE. Then, a general structure and related design method for ternary RTD circuit are proposed. The examples demonstrate that the design method is handy to operate which is also sutiable for binary circuits design.