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Data Transmission Over SDH With Virtual Concatenation

Posted on:2004-05-10Degree:MasterType:Thesis
Country:ChinaCandidate:X LiFull Text:PDF
GTID:2168360122967305Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
There are up to 300 million Ethernet access ports all over the world, and most of the IP traffic is carried on Ethernet. So the connection between Ethernets located in different regions is coming to be an intense area that many researches are aimed at. The LAN and backbone speed have skyrocketed to 10Gb/s, but the access network speed remains under 10Mb/s. Fastness, reliability, and flexibility are our destination. Ethernet over SDH is a good choice since SDH can provide the excellent traits we need.In this article, I will discuss several popular types of encapsulation and virtual concatenation of EOS (Ethernet Over SDH). The necessary analyze is presented also. And I will come up with my one-chip solution of Ethernet Over SDH. HDLC/LAPS is used as encapsulation protocol to finish the encapsulation and rate adaptation of packets. But because of the defect of HDLC/LAPS mechanism, for example the delineation and the byte stuff, it can't be applied to very high speed environment. Other encapsulation protocol ,GFP, is a trend. Since in this design the system speed is not so high, we can still use HDLC/LAPS. Different mapping scheme will be applied according to the rate of data source. In this design, up to 64 VC-12 virtual concatenation is available, or a whole VC-4 if needed. Meanwhile, the design supports the transmission of 4 data source in a single VC-4, without interrupting each other. With VC-12 virtual concatenation, we can make efficient and flexible use of the bandwidth. SDRAM, as a mass storage medium, is applied also. In this design, I use HY57V643220CT-6, with 32bit data width, up to 166M system clock, as the buffer of VC-12 virtual concatenation alignment and Ethernet data transmission. My task is to write the code of HDLC/LAPS, VC-12 virtual concatenation and SDRAM interface. The design has been verified on hardware.
Keywords/Search Tags:EOS(Ethernet over SDH), HDLC/LAPS, VC-12 virtual concatenation, SDRAM
PDF Full Text Request
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