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Eos System Of Virtual Concatenation Technology-based Asic Design

Posted on:2003-05-10Degree:MasterType:Thesis
Country:ChinaCandidate:X B LiFull Text:PDF
GTID:2208360065951022Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
In recent years, Internet market has been growing at much greater rate. Because of the growth, there is a great need for expanding the scope of Ethernet area. First, established service providers and upstart providers now offer public LAN service. The LAN services that they offer allow customers to connect their sites and access the Internet in a way that is easy to manage, in many cases, significantly less expensive than traditional TDM private lines.What are the existing transmission resources to be used? One of the best Telecom resources is SDH in the world. Transferring Ethernet Frame over SDH is a sample and cheap technique to connect LANs within a private and public network.The dissertation recommends a protocol suite structure of Ethernet over SDH. Based on the introduction and analysis a series of ITU-T protocols of EoS, this dissertation concentrates on the ASIC/FPGA design and implementation of EoS system. This design is finished by the Top-down method. To implement the design, the best EDA tools, such as Synplify_pro, Nc_verilog and the Verilog HDL were used. After all the cell modules being simulated, the whole design is verified in the system level with C language.This product has being verified on the chip now. It is expected to be sold in April, 2002.
Keywords/Search Tags:EoS LAPS, MAC, ASIC, VC
PDF Full Text Request
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