The Design Of Communication Control Board And Implementation Of HDLC Send Link

With the network of the-third generation mobile communication applied in business, All-IP is well recognized, as existing of many technical advantages. All over the world, companies which design CDMA2000 station system using all-IP technology are rarely, in which Motorola as the representative of foreign and ZTE and Huawei as the representative of the domestic. Communication control platform is responsible for processing and distributing signaling as one of the important part of the base station in the CDMA2000 AⅡ-IP station. Communication control platform plays an important role in the station designs, because the normal performance directly related to the correctness of communication processing.In this paper, we describes the components of ALL-IP CDMA2000 base station, the overall design principles and characteristics of the performance, including the benefits of the communications networks and signaling interfaces. The design specification of CDMA2000 base station and hardware configuration were described. Detailed analysis the signaling process of the base station, the communication control board as the center signaling processing unit of the base station is well expressed. During the processes of call signaling between a mobile station and the base station can verify the practical performance of communication control board.This article relies on CDMA2000 ALLIP communications platform, which is based on the Ethernet layer 2 switching idea, using MPBO of ZTE as the CPU to design the communication stations communication control veneer. Hardware circuit mainly includes bus conversion, signaling links and control circuit. CCP use PLX Asic PC19054 to realize PCI bus to LOCAL bus conversion in the bus conversion unit, and applies BCM5328 which is invented by BROADCOM on Ethernet layer 2 switching. CADENCE company simulation software is applied in signal topology and the simulation of signal integrity, improving the quality of the signals, reducing the incidence of hardware problem.Achieved HDLC sending link through FPGA of this platform, explained the key technical characteristics of HDLC protocol, functional block diagram of the sending unit and implementation of sending code. Described the coding process of each function unit, and simulated the critical timing on ModelSim SE6.0, the data transmission rate up to 9.8304M/S.For testing each module of the hardware platform, as system power slow start debug, the electrical test of MPBO, the electrical test of UART and network, analyzing the fault location. Tested PCI bus data transfer rate up to 70M/s, UART baud rate to 115200bps,+5V power supply to meet the requirements of the signal, sending 64-byte Ethernet frames more than 138,200/s. In the station function test, based on the measured data and waveform, the CCP realized signaling flow and media streaming data transmission function, and achieved relevant requirements.