Design And Implementation Of FPGA-based Ethernet Logical Link Control Function

With the development of communication technology, people require higher communication quality. At the same time, the laser communication technology is increasingly used in engineering and practice because of its low cost, quick installment, eavesdropping-proof character and so on. However, due to atmospheric attenuation and the random channel errors and other factors, the BER of laser communication is high. However, traditional Ethernet do not have the error control function, so, the traditional Ethernet transmission used in the laser communications cannot meet modern communication requirements.Aimed at the problem above, I have proposed my design of error control function added to the traditional Ethernet in this dissertation. Firstly, the current situation of Ethernet data transmission is described in the first part. Secondly, the traditional realizations of error control function are introduced. HDLC Protocol and the automatic repeat request, which are used in my design, are highlighted. Then, the detail functions and implementations of each part in my own design of the transmitter part are introduced. And then the FPGA implementation and timing simulation of some key modules, such as error control module, receiving treating module, sending treating module and queue management module are provided in this thesis, the results of board-level test show that the design is reasonable and stable, the desired target has been achieved.