OPTICAL SIMULATION OF SINGLE EVENT UPSETS IN SILICON DEVICES

Single event upsets in integrated circuits are caused by single energetic charged particles of cosmic or radio-active origin, which leave a trail of free charges in the semiconducting material. Most commonly, an integrated circuit is tested for sensitivity to single event upset using particle accelerators. Other more economical means can be used to generate trails of free charges and thereby simulate the passage of a charged particle.;Since metal electrodes are opaque, they can prevent a successful optical simulation of a single event upset. To overcome this obstacle, a method was developed by which the same laser burns holes into electrodes covering a silicon chip, without harming the underlying circuit. Through these holes, optical simulation can then be performed. Future improvements are also suggested.;Herein simulation using focused light pulses is reported. The theory for optical simulation in silicon devices was developed. With it, a diffraction-limited experimental system was implemented and tested for performance. Two preliminary experiments were performed on photosensors. The principal experimental results were compared with data obtained from accelerated particles. Experimental results on bipolar memories and power field effect transistors, using these diverse testing methods, are found to be in good agreement when reasonable assumptions are made. A p-channel device was upset for the first time, by simulating an ion heavier than uranium.