The Research Of Ultra-Wideband Microwave Frequency Synthesizer Based On Phase Locked Loop With Delta-Sigma Modulator

Frequency Modulated Continuous Wave?FMCW?radar is widely used in the field of near-distance detection,occupying an important position in modern radar family.As the core of FMCW radar,a high-performance FMCW frequency synthesizer is required to generate the transmitted signal and local oscillator signal.An ultra-wideband FMCW frequency synthesizer is designed based on Phase Locked Loop?PLL?technique with Delta-Sigma modulator?DSM?,which owns the advantage of low power consumption,ultra-micro frequency resolution,low phase noise?PN?,low spur noise and ultra-linear frequency sweeping.The main works and achievements of this paper are as follows:1.The relationship between radar ranging performance and features of FMCW synthesizer is investigated.To improve the distance and velocity resolution,the FMCW synthesizer needs much better frequency sweeping linearity?FSL?as well as larger output frequency band and sweeping period.Given the coupling between the transceiver channels and near-field signal reflection interference,it is significant to restrain the phase noise and spurs for increased dynamic detection range of FMCW radar.2.The basic principles and implementation methods of single-order and multi-order DSM are expounded,and the characteristics of oversampling and noise shaping are explained.Theoretically,the higher sampling frequency and larger order the DSM utilized,the lower quantizing noise at low frequency will be obtained.Furthermore,the output phase noise of DSM-PLL arising from every section in the loop are analyzed.The feasibility of generating high-performance sweep signals by DSM-PLL is verified in theory.3.The implementation of C-band FMCW frequency synthesizer is determined,which is the result of the analyses on DSM-PLL and the selection of required electronic components.PLL synthesizer chip HMC703 is select as the combination of phase frequency detector?PFD?,3-order DSM and high-speed frequency divider,which enables the flexible frequency sweeping function of DSM-PLL.In addition,the voltage controlled oscillator?VCO?chip HMC586 and a 4-order active loop filter are used in the DSM-PLL.4.The frequency hopping characteristic and phase noise of DSM-PLL whose output frequency is over 4.2-7.2 GHz are simulated by ADIsimPLL.Moreover,the whole circuit model of DSM-PLL with the same parameters as selected electronic components is established in Advanced Design System,and the linear frequency sweeping property is acquired by simulation.The simulation results show that the frequency hopping characteristics,PN and FSL of DSM-PLL meet the specifications when the loop bandwidth is540 kHz and the phase margin is 44°.5.The C-band FMCW frequency synthesizer is fabricated and tested.Measured results indicate that the power consumption equals 865 mW,the output frequency covers 4.2-7.2GHz and the output power is-2-0 dBm.The frequency hopping time of DSM-PLL is less than 39.8 us and frequency resolution is 13 Hz.Besides,the PN is better than-117dBc/Hz@10 kHz,-117 dBc/Hz@100 kHz and the spurious power is less than-69 dBc.6.A new method for measuring the FSL is proposed.The FMCW signal is segmented and the instantaneous frequency of each segment is demodulated.These results will be spliced??into the entire-band instantaneous frequency of the initial FMCW signal,which implies the actual frequency sweeping slope and FSL.The amplitude noise of each segment has a negative impact on the demodulation accuracy,so a Weaver image rejection mixer is utilized to down-convert the frequency sweeping signal to a narrow-band one.The narrow-band signal is demodulated after the amplitude noise being restrained by a band-pass filter.The measurement results show that the frequency sweeping slope is 2999.3078 GHz/s and the FSL is 4.12?10^-6.