Research On Phase-locked Loop Technology And FPGA Implementation Of GNSS Signal Tracking Loop

The Global Navigation Satellite System(GNSS),as a space-based radio navigation positioning system providing three-dimensional coordinates,velocity,and timing information worldwide,has been provided as a fundamental time and location service to individuals.Tracking,which plays an extremely important role in the process of GNSS signal reception,is directly influenced by the improvement of GNSS signal tracking performance,impacting the overall performance metrics and user experience of the receiver.The phase-locked loop(PLL)is the key component used to achieve GNSS signal tracking.Therefore,achieving a balance between the dynamic performance and stability of the receiver becomes meaningful,especially in high dynamic environments.This research focuses on the study of phase-locked loop technology and the GNSS signal tracking loop,and investigates the introduction of the T-L transform method during the digital filtering process of the PLL to enhance the tracking capability of the PLL for phase or frequency variations in high dynamic signals.The specific contents are as follows:(1)The composition and role of the phase-locked loop are studied,and its mathematical model is provided,based on the principle of carrier signal tracking.The transfer function and dynamic performance of the analog phase-locked loop,as well as the composition and transfer function of the all-digital phase-locked loop,are analyzed.(2)The dynamic performance and noise characteristics of the phase-locked loop are analyzed,establishing a relationship between the dynamic performance of the phase-locked loop and its order.A second-order phase-locked loop is designed using a first-order low-pass filter as the loop filter,and a third-order phase-locked loop is designed using a second-order loop filter.The tracking characteristics of each phase-locked loop are theoretically analyzed.(3)A new method based on the T-L transform,derived from the Boxer-Thaler expansion,is introduced to design digital filters in the process of digitalizing the analog filters.The noise resistance and anti-aliasing capabilities of the digital filters designed using this new method are validated through MATLAB software.(4)The analog phase-locked loops of different orders are digitized,and the all-digital phase-locked loops are obtained by utilizing the digital filters designed using the new method as the loop filters.The all-digital phase-locked loops are implemented through Verilog hardware programming language and simulated using Quartus II software.Simulation results demonstrate that the second-order all-digital phase-locked loop effectively locks phase step signals and frequency step signals,while the third-order all-digital phase-locked loop effectively locks frequency ramp signals.