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Design And Implementation Of Time Deterministic System In Real Time Ethernet Based On FPGA

Posted on:2024-07-11Degree:MasterType:Thesis
Country:ChinaCandidate:B ZhengFull Text:PDF
GTID:2568306920494254Subject:Computer technology
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Today’s proliferating data services bring with them massive congestion crashes,data packet delays,and remote transmission jitter.Traditional Ethernet uses event-triggered data transmission,which can only reduce end-to-end latency to a few tens of milliseconds.However,communication fields such as industrial control,transport and medical,where private buses are gradually being replaced by Ethernet,require more demanding real-time network performance.These emerging services need to control end-to-end latency to the microsecond to several millisecond level and delay jitter to the microsecond level.Therefore,time-deterministic networks that meet the application requirements of high real-time performance,security,reliability and fault tolerance have become a hot research topic in the current emerging markets of energy,transportation and healthcare.In this paper,based on the Gigabit Ethernet MAC frame of the RGMII interface,two new data frame formats,transmission start frame and system network management frame,are proposed,which can indicate the current on-line status of the nodes in the network,and each node is able to send and receive at predefined time slots.Data is sent and received between systems using the PCIE interface,which divides all nodes into one clock-synchronous master node and multiple clock-synchronous slave nodes.When the message is sent,the clock-synchronous master node can provide the system standard time to other nodes,and the clock-synchronous slave node will synchronise the time of this node to the system time to achieve reliable transmission of data between multiple devices.A simulation verification platform was built to verify the specific functions of the designed interface circuit,including: register function verification,interrupt function verification,data sending and receiving verification.Three different message lengths were tested at board level on the development board,and the data was correctly sent and received in a Gigabit Ethernet environment.The multi node transceiver transmission method introduced in this article can obtain the system time of the clock master node and clock slave node in real time,provide real-time data transmission,ensure the determined communication service quality.
Keywords/Search Tags:Time-Deterministic Networking, RGMII Interface, Gigabit Ethernet, PCIE, Simulation Verification
PDF Full Text Request
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