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Implementation And Verification Of Gigabit Ethernet MAC Based On CoreConnect Bus

Posted on:2017-11-24Degree:MasterType:Thesis
Country:ChinaCandidate:Z ZhaoFull Text:PDF
GTID:2348330488972979Subject:Engineering
Abstract/Summary:PDF Full Text Request
In the rapid progress of electronic information technology today, the development of various kinds of electronic equipment networking gradually, this kind of phenomenon makes the application of network communication is more and more widely. In many of SoC chips that need to provide network supporting, data communication is achieved by integrating with Ethernet, and the design of Ethernet MAC becomes the main part to implement this functionality. In addition, due to the growing network transmission data traffic, the Ethernet that works under the transmission rate of 10/100 Mbps has been short of the current network communication demand, so we urgently need the Ethernet MAC with higher speed. This thesis mainly designs and verifies the gigabit Ethernet MAC based on Core Connect bus.Based on the understanding and analysis of IEEE 802.3 protocol standard, first of all, this thesis briefly expounds related theory and technology about IEEE802.3 MAC layer and introduces in detail the on-chip bus interconnection structure and the physical layer interface technology for Ethernet MAC hooking with system. Then this thesis parses the working principle of gigabit Ethernet MAC, presents the design of gigabit Ethernet MAC division as well as the design scheme, and completes the EMal, EMAC, EMIB statistics function module design, etc. This design not only achieves the traditional 10 / 100 Mbps Ethernet MAC under various functions, at the same time it increases the transmission rates further to 1000 Mbps and adds the data transmission structure which enhances the rapidity and accuracy of transmission. Based on the function of the gigabit Ethernet MAC and validation specification, this thesis has set up a platform module level verification and has been simulated the design of the controller module through the NCsim simulation tools. And it sets up a virtual test platform, establishes the Ethernet PHY simulation model and writes the validation test vector; then it uses hardware and software collaborative verification technology to verify the function of the controller and the features of the interconnection in system level. Finally, the simulation result is analyzed whether meet the requirements, and finishes the verification code coverage.From the simulation results of module level and virtual platform s ystem level, the gigabit Ethernet MAC of this thesis achieves 1000 Mbps data transmission in the case of 10/100Mbps rate; it supports MII/GMII Ethernet PHY interface standard, and is able to transfer data correctly in a variety of patterns and under the injection of various errors. At the same time, using multistage high-speed high-performance Core Connect bus, the gigabit Ethernet MAC is articulated on SoC. This provides application support related Ethernet technology for data communication and operations configuration.
Keywords/Search Tags:MAC, CoreConnect, Gigabit Ethernet, SoC, hardware and software co-verification
PDF Full Text Request
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