Design And Implementation Of Low Power SAR＿ADC Based On 28nm Process

With the progress of society,people make much of healthy life,portable detection and treatment equipment and intelligent wearable electronic products enter thousands of households.These products have the demand of small size and long endurance,but now the research on new battery materials has entered a bottleneck period,so the low-power design of the chip is particularly important.The ADC is an essential construction in chip,which is responsible for converting the collected continuous signal into 0/1 signal that can be identified and processed by electronic equipment.Among all ADC kinds,the SAR ADC has the superiorities of briefly circuit composition,little power and tiny chip area.Based on TSMC 28 nm process,a low-power 12-bit SAR ADC used in intelligent health monitoring instruments is designed according to the forward design workflow of digital-analog combined circuit.The overall circuit design,pre-simulation,layout design and physical verification are finished.In this paper,the self-designed gate voltage bootstrap switch substituted the traditional MOS switch to ensure that the switching impedance does not fluctuate with the input and remains stable,and improved sampling precision.Based on the traditional capacitor array,a bridge capacitor digital-to-analog converter with low five and high seven is designed,which saves 60%of the capacitance amount,minimize the chip acreage,minimizes the quantities of switching turns and decreases the parasitic capacitance.The comparator is related with the conversion accuracy of the whole circuit.In this paper,a self-designed latch comparator with two-stage pre-amplifier function is used.The bias voltage of the pre-amplifier is generated independently by the bias circuit.The addition of the pre-amplifier circuit reduces the interference of the kickback noise,and the offset voltage storage technology is added to each stage of the circuit to ensure the accuracy of the data comparison.This design is a digital-analog hybrid circuit.In the layout design,the overall layout and wiring are according to the SAR ADC workflow,and the protection ring is added to the simulation part and the important signal line part to prevent noise and other interference.The designed circuit is simulated with the spectre tool.The results show that at a supply voltage is 1.8V,50MS/s sampling rate,the ENOB is 10.4 bit,the SNDR is 64.3 dB,the SFDR is 79.2 dB,the power is 667 μW,and the FOM is 4.94 fJ/step.