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The Research And Design Of Two-point Modulation Phaselocked Loop In 2.4GHz Direct-Conversion Transmitter

Posted on:2023-12-27Degree:MasterType:Thesis
Country:ChinaCandidate:X D SuFull Text:PDF
GTID:2558307058997509Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
As an important part of the two-point modulation transmitter,the two-point modulation phase-locked loop has great performance advantages in terms of bandwidth,power consumption,chip area,etc.However,the two-point modulation phase-locked loop still has many technical difficulties such as modulation path mismatch,narrow tuning range and large frequency modulation errorThis thesis is oriented to the 2.4GHz general frequency band,for BLE Bluetooth applications,based on the TSMC28 nm process,a low-voltage two-point modulation phase-locked loop circuit is designed.Aiming at the gain mismatch problem of the two-point modulation phaselocked loop modulation path,a gain calibration scheme based on a dynamic comparator is proposed.By comparing the changing trend of baseband data and tuning voltage,the magnitude and direction of the modulation path mismatch are obtained,and the gain of high-pass path is dynamically adjusted to realize gain matching.This paper improves the structure of the traditional Gaussian filter and designs a Gaussian filter based on a look-up table to save hardware resources.In addition,for low-voltage applications,a Class C voltage-controlled oscillator is designed,the gate voltage is independently biased,and the cross-bias technology is used to extend the tuning range to 50 m V-600 m V;the TSPC2/3 frequency divider with embedded logic gates is designed,it constitutes a multi-mode frequency divider with a dynamic power consumption of 294μA.The simulation results show that the overall power consumption of the system is less than2 m W,under the operating voltage of 0.7V,the lock time is about 25μs,the VCO output frequency range is from 4.44 GHz to 5.2GHz,the phase noise at 1MHz frequency offset is about-110 d Bc/Hz,and the output voltage ripple of the loop filter is controlled within 2m V.In the GFSK modulation mode,the baseband modulation rate of 1Mbps is realized,the frequency deviation is 250 KHz,and the modulation error is 15%.The frequency modulation meets the design requirements.
Keywords/Search Tags:Two-point modulation, Phase locked loop, Fractional divider, Gain calibration
PDF Full Text Request
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