Research On Memristive Negative Ternary Digital Logic Circuit Based On Binary Memristor

As the fourth basic circuit element after resistance,capacitance and inductance,memristor is a passive nonlinear element.It has nanometer size,non-volatile characteristics,nonlinear characteristics and hard switching characteristics,and can be applied to chaos,neural networks and digital logic circuits.At present,digital logic circuits based on memristor research are mainly concentrated in binary logic circuits.Compared with binary logic,multi-value logic circuits can carry more information with fewer input signals,which can improve the advantages of transmission signal line and integrated circuit information density and processing information time and space utilization.Among them,ternary logic is the most commonly used multi-valued logic,which can be divided into positive ternary(0,1,2),negative ternary(0,-1,-2)and balanced ternary(-1,0,1).The positive ternary and negative ternary are mutually symmetrical logic,and there are certain similarities in the circuit.In order to complete the ternary digital logic circuit,this article uses the binary Knowm memristor to design a negative ternary digital logic circuit based on the existing positive ternary digital logic circuit,and uses the voltage(0V,-1.65V,-3.3V)to represent negative ternary(0,-1,-2),and finally verify the effectiveness of each circuit on LTSpice.The main content and innovations of this article are as follows:(1)Based on the binary memristor,negative ternary digital basic logic gate circuits are designed,which are cascaded to obtain negative ternary basic composite logic gate circuits.First,the negative ternary "AND" gate,"OR" gate and "NOT" gate circuit are designed according to the truth table and characteristics of binary memristor.Secondly,the Knowm memristor model in the LTSpice software is generated according to the Spice code.The model is used to build negative ternary basic logic gate circuits,and then the basic logic gates are cascaded according to the negative ternary composite logic circuit schematic diagram to obtain negative ternary minimum and maxmum circuit,negative ternary"NAND" gate,"NOR" gate,"XOR" gate and "NXOR" gate circuits.And the effectiveness of the circuits is verified by simulation and analysis of the characteristics of the above circuits.(2)Novel negative ternary encoders and decoders are designed based on negative ternary digital logic gates.The 3-1 line encoder is designed by using the negative ternary "NOT" gate circuit and the maximum circuit,and the 9-2 line encoder is designed plus negative ternary "AND" and "TI"gate and minimum circuit.Novel 1-3 line decoder circuit is composed of negative ternary "NOT"gate and "AND" gate.Then two 1-3 line decoders and basic logic gates are combined to design a 29 line decoder.Then,a negative ternary display decoder is designed by using the realized negative ternary 2-9 line decoder,ternary "AND" gate and minimum circuit.Finally,the correctness of the display decoder is verified by connecting the output of the display decoder to the corresponding pins of the seven-segment digital tube to display nine numbers from 0 to 8.(3)A negative ternary digital sequential logic circuit is designed based on negative ternary basic logic gate and 1-3 line decoder.First,using the negative ternary "AND" gate and "NOR" gate circuit to design SR latch circuit that can store the input signal.Secondly,on the basis of the SR latch circuit,using the negative ternary basic logic gate circuit to change the input signal,negative ternary SR flipflop,D flip-flop,JKL flip-flop and T flip-flop can be obtained respectively.Finally,the abovementioned circuits were simulated and debugged on LTSpice to verify the effectiveness of each circuit.