Research On Memristor-Based Logic-in Memory Technologies

Combining the functions of Boolean logic and non-volatile memory,logic in memory?LIM?can eliminate data movement during the computing process to achieve the futuristic in-memory computing,which may solve the problem of the“von Neumann bottleneck”in the conventional computer architecture.Memristor,an electronic device in which resistance state is used to denote information,provides a feasible way to achieve a compact LIM function.However,the investigation on memristor-based LIM is still in an embryonic stage.Many aspects such as logic primitive circuits,logic cascade methods,and array compatibilities,etc.need to be investigated further.To solve some problems in current memristor-based LIM,this dissertation investigates two complete stateful logic families?“SDBM logic”and“AP-BRS logic”?,a complete sequential logic family?“RFSM logic”?,and two schemes to reduce the latency of stateful logic computation?“Changing coding scheme”and“configuring parallel-circuital structure”?based on the characteristic of several real memristive devices.The main contents of this dissertation include:1.The sub-circuit based stateful logic families may face the operation reliability problems due to the conduct line resistances and capacitances between the different memristive devices of the sub-circuit along with the increase of array size.To address this problem,Chapter 2 investigates a stateful dual-bit memristor logic family?SDBM logic?in which the basic circuit structure is mainly composed by a single dual-bit memristor?DBM??Section 2.2?.The feasibility and completeness of the proposed logic family are discussed from logic primitive circuit?Section 2.3.1?,completeness verification?Section 2.3.2?,cascading method?Section 2.3.3?,and array implementation?Section 2.3.4?.Finally,the advantages and disadvantages of this SDBM logic are discussed.2.The logic primitive circuits of the current stateful logic families are all difficult to be configured by the devices located in the adjacent layer of the 3-dimensional crossbar array.Such problem hinders the stateful logic application in high-density and large-capacity memory arrays.To address this problem,Chapter 3 investigates an anti-parallel dual memristor?AP-BRS?stateful logic family whose basic logic primitive circuit is compatible with 3D crossbar memory arrays.The feasibility and completeness of the proposed logic family are discussed from the mapping between the logic function and logic primitive circuit?Section 3.2?,logical cascade and completeness verification?Section 3.3?.Finally,three logic families with different cascading methods are compared?Section 3.4?,indicating an inherent characteristic of spatial-time wise cascading of the stateful logic.3.LIM feature of the stateful logic circuit can reduce the delay and energy consumption caused by data movement.However,the time-related operation process and cascading feature make the latencies from the logic operation and the cascading process become the major bottlenecks in stateful logic computation.The situation is even worse in the time-wised SDBM logic.To address this problem,Chapter 4 investigates two approaches to reduce the latency of the logic operation in SDBM logic based on the deep understanding of the core principle of the SDBM logic?Section 4.2?.Without changing the basic circuit structure and operation methods,the logic operation time can be reduced by only changing the encoding scheme?Section 4.3.1?.Meanwhile,the parallelism of operations can be increased by configuring the parallel-circuital structure in the array?Section 4.3.2?.Combining the two approaches,a Time-efficient stateful dual-bit memristor logic family?TSDBM logic?is achieved?Section 4.4?,which corresponds to55.6%improvement compared with previous work.4.Sequential logic is the other LIM strategy,which provides an alternative circuit-level solution for constructing the in-memory computation architecture.However,mostly sequential logic families face the problem of incompatible"non-volatile"and"logical completeness."To address this problem,Chapter 5 investigates a new sequential logic family based on a special single memristor?RFSM logic?.A reconfigurable finite state machine?RFSM?relationship is described based on a special switching characteristic of the TiO₂-based 1D-1R device.Using the RFSM relationship?Section 5.2.1?,a fully functional and non-volatilely sequential logic functions are achieved by setting two different voltage conditions as logic“1”?Section 5.2.2?.Then,the device requirements to trigger this RFSM logic are discussed?Section 5.3?.Finally,the computational architecture of this RFSM logic is discussed,and the difference of architecture among several LIM families are revealed?Section 5.4?.