Research On Memristive Balanced Ternary Digital Logic Circuit Based On Binary Memristor

Integrated circuit technology has developed rapidly over the past few decades,but the continuation of Moore’s Law has encountered difficulties as the size of traditional CMOS devices has gradually shrunk to the limit.As a new type of device,binary memristor has many advantages,such as small size,low power consumption,and compatibility with CMOS technology.It provides a new idea for solving the ‘bottleneck’ problem of Moore’s Law.In recent years,binary memristors have also shown their unique advantages in the fields of neural networks,chaotic circuits,and digital logic circuits.In the research of memristive digital logic circuits,the related works of ternary logic have attracted the attention of researchers.Compared with the traditional binary logic,the ternary logic,as a multi-valued logic,has higher information density and information processing capability.The balanced ternary logic has the advantages such as no needing to set sign bit,and symmetry of addition and multiplication.Therefore,combined with the unique advantages of binary memristor,the study of memristive balanced ternary digital logic circuits is expected to further improve the efficiency of information storage,processing,and transmission,and bring new breakthroughs to the manufacture of high-density information logic systems.The main research contents of this paper are as follows:(1)The balanced ternary logic gates are designed based on binary memristors.Using the resistance switching characteristics of the memristor and the switching characteristics of the MOS FET,the balanced ternary ‘NAND’ gate,‘NOR’ gate,‘NOT’ gate,‘TMIN’ gate and ‘TMAX’ gate are designed.The above logic gates are simulated and verified in the LTSpice simulation software,which confirms the effectiveness of the designed circuit structure.(2)The balanced ternary single-variable logic function circuits based on binary memristor are designed.Firstly,27 kinds of single-variable logic functions of balanced ternary are introduced,and then combined with the characteristics of binary memristor,the circuits of "three-state to two-state" logic and "three-state to three-state" logic are respectively designed,and the designed circuits are simulated and verified using LTSpice.(3)Balanced ternary encoder,decoder and multiplexer circuits are designed based on the balanced ternary logic gates and single-variable logic function circuits.Firstly,the encoder circuits based on TMAX gate,TMIN gate and single-variable logic function circuit are proposed,including3-1 encoder and 9-2 encoder.Secondly,a novel balanced ternary 1-3 decoder circuit is designed,which reduces the consumption of the number of components compared with the traditional design method,and then combined with the 1-3 decoder and TMIN gates,a 2-9 decoder circuit is futher proposed.Finally,a balanced ternary multiplexer is designed using the realized balanced ternary 1-3decoder,TMIN gate and TMAX gate.(4)The design schemes of balanced ternary application-type combinational logic circuits are further proposed,including balanced ternary half adder,full adder,multiplier and numerical comparator.Four design methods are used,which are decoder-based method,multiplexer-based method,the method of combining multiplexer with univariate logic function circuits and logic gates-based method.Finally,comparisons and analyses are carried out on the circuits designed by the above four methods to explore the advantages and disadvantages of each.