Font Size: a A A

The Design Of Ultra Hd Multi-camera Controller Based On FPGA

Posted on:2022-11-23Degree:MasterType:Thesis
Country:ChinaCandidate:M X SongFull Text:PDF
GTID:2518306773985309Subject:Computer Software and Application of Computer
Abstract/Summary:PDF Full Text Request
As an extension of human vision,image acquisition technology is widely used in people's production and life.The traditional single-camera acquisition solution cannot be used in applications with a large viewing angle due to its small viewing angle.Therefore,more and more video capture systems use multi-camera solutions.Compared with the single-camera solution,multi-camera devices require faster processing speed,more cache resources and larger transmission bandwidth to meet realtime processing requirements.However,the multi-channel camera control platforms on the market often fail to meet these requirements and cannot take into account ultrahigh-definition capture,real-time processing and lossless uncompressed transmission.In this paper,a multi-channel ultra-high-definition camera controller design based on FPGA is proposed.This device uses FPGA as the core processor;it realizes uncompressed video acquisition through six-channel 4K@30fps CMOS image sensor module.In terms of communication interface,this device has HDMI interface and 10 Gigabit Ethernet interface with 40 Gbps bandwidth,which can display 4K@30fps video in real time and transmit video data.This article designed a 70-page schematic design and a 14-layer printed circuit board.This paper designs the hardware system based on functional requirements,and completes the 70-page schematic diagram and 14-layer printed circuit board design.The high-speed signal rate of the board is up to 10.3125 Gbps.In this paper,the signal integrity simulation of the high-speed signal is carried out to verify the rationality of the layout.The current requirement of the processor's 0.85 V core voltage is as high as25 A.This paper optimizes the decoupling capacitor design of the power supply and the division of the power plane through PDN impedance simulation and DC voltage drop simulation.This paper designs the logic code and software code to realize the system function.the system function.The hardware logic based on Verilog HDL realizes the verification functions of real-time acquisition,synchronous buffering,splicing processing,local display and remote transmission of six-channel video.The software code based on C language realizes the control and drive of the camera.After building the software and hardware platform,this paper conducts functional test and signal integrity test on the hardware module,and verifies the timing correctness of the logic code through the online logic analyzer.After testing,the system realizes the real-time splicing of six channels of uncompressed video,the system power consumption is less than 35 W,the resolution of the six channels of video collected is3840 × 2160,the frame rate is 30 fps,the video quality of the local display function is4K@30fps,The display delays are all less than 200 ms,and the single-channel data bandwidth of long-distance transmission is 10 Gbps.In summary,this paper realizes the hardware circuit design and software verification,realizes the cooperative control of the six-channel 4K@30fps CIS module,supports 4K@30fps local display and 40 Gbps bandwidth remote transmission function.This device has the advantages of high frame rate,high resolution,low latency,and uncompressed video.The application scenarios include experimental development,smart monitoring,smart transportation,panoramic live broadcast,and smart medical care.
Keywords/Search Tags:High speed digital hardware design, FPGA, CMOS image sensor
PDF Full Text Request
Related items