Design Of Low Power And High Performance IF-digitize Receiver

With the development of communication technology,the demand for compatibility of communication equipment has become increasingly apparent.As a new technology in the field of wireless communication in the new era,software radio has attracted the attention of more and more scholars.Compared with traditional radio systems,software radio has the advantages of programmable parameters,high degree of software and good versatility.As an important part of software radio,IF-digitize receivers have attracted a large number of domestic and foreign scholars to study and explore in this field.Zero-IF scheme are used widely during the early period of digital receiver,but it can not get the precise quadrature amplitude and phase.Therefore,with the IF-digitize technology becomes a relatively mature technical means,has become the most suitable solution for the current era.The so-called IF-digitize receiver system is to amplify the high-frequency input signal through the RF front-end,and mix it to a lower IF frequency,directly sample at the IF frequency,and then use a digital down converter to obtain a quadrature I/Q signal.At present,the IF digital receiver processing solution has been widely used in fire control,military,radar and other fields.This article uses 0.18?m SiGe BiCMOS technology to design an IF-digitize receiver that can be applied to radio products of fire protection and public security mechanism,and completes the system scheme,circuit and layout design.This work can concludes as follows:(1)Investigate the research status of domestic and foreign IF-digitize receivers,analyze the advantages and disadvantages of domestic and foreign IF-digitize receivers,and introduce the topic this work mainly focus on.(2)Theoretical analysis of the IF-digitize receiver,detailed analysis of the important theoretical foundations involved,such as signal sampling theory,digital down-conversion technology,digital filter,etc.,and by combining the theory with design,improve the actual design solution.(3)Interpreted the system indicators of the IF-digitize receiver,analyzed the relationship between sensitivity,dynamic range,noise figure and other parameters,and then analyzed the solution of this work,clarified the system's requirements for the performance of each module circuit,and introduce each module in the system which includes RF front-end,ADC,digital filter,digital down-converter,automatic gain control and phase locked loop.The frequency synthesizer provides local and clock signal for the system,the input signal is amplified by the low noise amplifier,the IF narrowband signal is generated through the mixer,and digitized by an analog-to-digital converter.The digital filter is designed for preventing the aliasing from spectrum.The digital domain realizes the digital down-converter and automatic gain control functions.(4)Introduce the basic theory of the core module of the system,phase locked loop.Mathematically derive the stability and phase noise of the important indicators of the phase-locked loop,and introduce the working principle of the core modules in the design of the phase-locked loop,such as frequency detector,phase detector,charge pump,fast lock mode,voltage controlled oscillator circuit,etc.,through reasonable circuit design and device selection,realize a charge pump circuit with good mismatch performance,a fast lock circuit with a lock time of less than 200?s,and a voltage control with low phase noise Oscillator circuit design.(5)On the basis of the receiver system's index requirements for each module,the basic principles of the remaining key modules of the system are explained,and a low noise amplifier circuit with low noise figure and high gain is designed,and a hybrid with high linearity and low power consumption is designed.A digital Mixer,and high dynamic range sixth-order sigma-delta band-pass ADC,the effective number of bits can reach 16 bit,in the digital domain to achieve digital down-converter,automatic gain control circuit and digital filter circuit.The system can digitally process the input frequency of 10-300 MHz,the overall power consumption is less than 20 mA,and the dynamic range can reach 81 dB.Many indicators of the system can be flexibly changed through the SPI structure,such as AGC attenuation value,bias current,extraction coefficient,and output rate,etc.