Design Of T/RX Analog Baseband And Data Converter For UHF RFID Reader

With the fast growth of IoT application technology, UHF radio frequency identification technology has been applied widely for its fast data transmission, long communicaiton distance and large data capacity. High performance reader chip become a research hotspot in recent years. The goal of this thesis is to research analog baseband and data converter applied in high-performance single chip UHF RFID reader. The achieved research results are as follows:1.Detailed investigation of the research situation about analog baseband and data converter in the UHF RFID reader chip at home and abroad has been completed. Based on the analysis of the different protocols such as EPC Global Cl G2, the system architecture and module circuit requirements of the chip which meets different protocols are proposed.2.The analog baseband in receiver includes eight order Butterworth channel selection filter based on modified Tow-Thomas Biquad, the pre-amplifier for optimizing noise performance, DC cancellation circuit and the automatic frequency tunning circuit for calibrating the cutoff frequency deviation of the channel selection filter caused by process variation. Monte Carlo simulation results show that the deviations in four cutoff frequency mode are ±4.34%, ±3.73%,±3.21%,±3.08% respectively. The system architecture of 10-bit Pipeline analog-to-digital converter is eight order 1.5-bit conversion unit and a 2-bit flash ADC. High performance gainboost operational amplifier and the comparator with kickback noise deduction technology have been designed. Simulation result shows that ENOB reached 9.52bit under 24MHz sampling frequency.3.A 10-bit current steering digital-to-analog converter has been designed in transmitter. The Encoded mode has been determined as six high bits of thermometer code and four low bits of binary code through Matlab modeling analysis. Based on the analysis of the influence on DAC yield caused by current source mismatch, the current source and switch arrays has been designed. The ENOB reached 9.92bit under 24MHz sampling frequency. The analog baseband includes a sixth order Butterworth pulse shaping filter and variable gain amplifier. Analysis and optimization of linearity and power consumption have been completed. The power consumption of the operational amplifier in the filter can be configured according to the cutoff frequency of the filter. The current consumption is 3.2mA in 1.35MHz mode and 1.26mA in 250KHz mode. The simulation results show that equivalent input third-order intercept point reached 28.1dBm@0dB Gain.