EEPROM Design For Printer Consumable Chip

In the 21 st century with the rapid development of information technology,the industry has received strong support from the country,especially the arrival of the Internet of Things and big data era.As a very important part of the information technology industry,memory plays an important role in the integrated circuit industry.An indispensable role,and plays an important role in the transformation of the entire society.As a classic representative of rewritable semiconductor memory,EEPROM plays a vital role in field of storage and low power such as system-on-chip and small electronic devices.Based on SMIC's 180 nm 2P4M process,An EEPROM used in the chip of printing consumables was designed.First,the design of the memory array was completed,and then analog peripheral circuits in the chip including high-voltage generation and sensitive amplifiers were optimized.Then Verilog modeling was completed,and finally verification of the chip was completed using UVM platform.The high-voltage generating circuit module in this design is the core device of the EEPROM,and is the key research module of this design.After considering many factors such as low power consumption and reliability,a new Dickson charge pump structure intelligent clock is adopted.In charge of design.For the design of the sensitive amplifier circuit,a pre-charge structure that has not been used in the industry is added.Compared with the traditional sensitive amplifier,this design adds "0" and "1" data detection functions to effectively reduce power consumption.In the design of the storage array,.The data interferes with each other.Finally,the most widely used and powerful UVM verification platform in chip verification is introduced,and UVM is used to systematically verify this design.The EEPROM designed in this thesis uses the IIC bus to communicate with the chip.The capacity of this EEPROM is 2Kbit.The three address matching pins can simultaneously mount 8 EEPROMs of the same type on the IIC bus.The maximum data read rate is 16Mb/s.The data writing rate is 64Kb/s,the working voltage in the read state is 2.1-3.3V,and the working voltage in the erasing state is 11.25 V,and the maximum power consumption is 48.65 u A at this time.The timing waveforms in each working state meet the design requirements.