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Research And Design Of A Serial EEPROM

Posted on:2006-02-12Degree:MasterType:Thesis
Country:ChinaCandidate:Z H WangFull Text:PDF
GTID:2168360152990280Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
As we all know, the information age and the knowledge economy are hot topics today. The invention of the transistor at Bell lab in 1947 means the threshold of the information age. The chip industry and the software industry are taken as the typical industries of the knowledge economy for granted. So, the microelectronic industry which focusing on chip designs and fabrications has become the important sign to measure the overall national strength of a country.Microelectronic technology's kernel is IC. MOS memories, which are typical IC products, also develop very rapidly. EEPROM is an important MOS memory and its role also can't be neglected.The chip researched in this thesis is a 4K serial electrically erasable and programmable read-only memory (EEPROM), which adopts I~2C-bus and SMIC 0.35μm Double Poly Three Metal Double Well CMOS technology. This chip has been implemented MPW in SMIC and has been met with success for the first time.Chapter 1 introduces all kinds of MOS memories, and especially discusses EEPROM's structure and operational principle. Chapter 2 introduces the I~2C-bus. Chapter 3 first introduces HF1801's general structure and function, then analyses the charge pump module, oscillator module, EEPROM's read and write operation, Schmitt trigger and WP protective circuit, and finally introduces the gate simulation. Chapter 4 mainly introduces how to realize the digital module's layout with SE and how to put the module's layout with the other layouts together; it also introduces the process flow and main device's PCM parameter.
Keywords/Search Tags:EEPROM, I~2C, charge pump, gate simulation, SE
PDF Full Text Request
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