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Research On High Performance Test Techniques For ARM Core SOC Electric Meter Chips

Posted on:2022-07-09Degree:MasterType:Thesis
Country:ChinaCandidate:K Y DuFull Text:PDF
GTID:2518306605970029Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
SOC can effectively reduce the development cost of electronic information system products,shorten the development cycle,and improve the competitiveness of products.It is the most important product development method that the industry will adopt in the future,in order to cope with the rapid development of SOC chip design and manufacturing technology.The new challenge to the chip testing industry,saving test costs and shortening the development cycle,this paper carried out research on the SOC test technology based on the low-end ATE tester,and obtained a low-level SOC chip electrical characteristics and functions that can be used in the MCU core.Software and hardware implementation schemes for rapid cost testing.The main work of the thesis is as follows:1.Aiming at the problem that the low-end ATE tester cannot directly test the complex function of the SOC chip,completed the design and research of the SWD debugging and SPI communication protocol between the ATE tester and the chip under test.By analyzing and researching the SWD debugging protocol,SPI communication protocol and interface,writing test program functions and test vectors,combining the serial port and oscilloscope for verification and comparison,the ATE test can control and control the SOC chip like an off-chip memory.Send instructions.The test result shows that the functions and test vectors completed in this paper can establish stable SWD and SPI communication,realize the test of complex functions,and meet the design requirements..2.Aiming at the problems of complex peripheral circuit testing and low test accuracy in traditional solutions such as software-based chip function self-testing schemes,the design research on the optimization of test peripheral circuits,the integration of electrical characteristic testing and functional testing has been completed.Using the technology of simulating SWD debugging and SPI communication,the complex peripheral circuits of the mother test board and the child test board are optimized into a single test interface circuit,and the test items are integrated,which improves the test accuracy and 7.41% machine utilization.3.Aiming at the common problems of high SOC chip mass production test cost and long test vector development cycle,based on the Py Qt tool and Python programming language,the design of the SOC chip test development auxiliary software platform was completed.By integrating the three functions of test vector conversion,automatic test program generation and test result analysis into the GUI human-computer interaction interface,the test process can be controlled and observed,which greatly shortens the development cycle of the test program.4.The mass production test results based on the ARM core SOC meter chip show that the mass production yield of the test scheme designed in this paper is 98.47%.The mass production test single chip test time is 30.312 s,and the power is low.Compared with the traditional solution,these reseach results reduce the test cost by 66.7%,and can shorten the test development cycle by 50% when using the test assistant software,and meet the design requirements.The test technology designed in this paper has been applied to the mass production test of SOC meter chip in the internship company,which is a good solution to the problem of long development period and high cost of SOC chip mass production test,and has some reference significance to the test development of the same type of chip in industry.
Keywords/Search Tags:SOC, Integrated Circuit Test, Automatic Test Equipment, ARM Core, Test Pattern
PDF Full Text Request
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