The purpose of integrated circuit test is to filter out the wafers with incorrect electrical function and logic error before packaging, so as to avoid increase in cost due to packaging of defective products. With the rapid development of the integrated circuit design and manufacturing technology, new types of chips such as high speed and high integration SoC has appeared, the demand for integrated circuit testing more and more increase, and the test cost is increasing rapidly.The work of this thesis aims at a production from Beijing Hongsi electronic technology Co. LTD used for USB KEY and personal financial terminal which is low power consumption, low cost, high safety, multi-function 32-bit password security chip and complete wafer test. Test projects include the algorithm, interfaces, the watch dog timer, programmable logic, serial number written and so on. The test task is done based on download chip operating system method. Compared with the scan test method, although our method is more complicated, but it can display error BIN value accurately to determine reason of the errors.Paper introduces the building up of the wafer testing hardware platform and the function of each structure and then how to use the corresponding tools to developed 8DIE test program and test pattern, and then use DC parameter measurement and logical function test to complete each project in the chip test.8DIE test compared to single test is about 8 times faster, improving the test efficiency and reducing the test cost.Because the integration of SoC is higher, at the time of producing the test program and memory test, using the method of built-in self test of the design for testability to make the chip automatically generate high fault coverage, high test coverage test pattern which has the advantage of controllability and observability and get rid of the dependence on test machine, reduce test cost.In the end, the mass-products developed by production test program and test pattern.During the production, it is necessary to seek better test program, modify the test pattern in order to improve the wafer test speed. The corresponding SoC chip should undertake the corresponding reliability and stability as well as the long-term monitoring of verification. As the continuous improvement and upgrading of product, production development programs need to be upgrade. |