Design Of 12 Bit Low Power Successive Approximation ADC

As a bridge between analog world and digital world,analog-to-digital converter is becoming more and more important in the field of electronic information with high-speed development.It is widely used in communication,industrial control,medical devices,artificial intelligence,aerospace military and other fields.With the continuous improvement of MCU chip and SOC chip performance,the requirements for the area,performance,power consumption and other technical indicators of a single complete module in the whole system have become more stringent.This paper is based on the xfab0.6um process of 12 bit low power ADC product development,and based on the design process of this project,the design of the paper is described.Different from the design of industrial chip,the ADC can work in the temperature range of-55??125?,the working voltage range is 3.3V?5.25V,and it can still work normally when the voltage deviates from this range.The sampling rate is 100ksps,the minimum power consumption is 1.99mw,the maximum power consumption is 3.89mw,which achieves the ideal design quality under the design index.Firstly,based on the principle of ADC,this paper compares the ADC with different structures,and highlights the advantages of SAR ADC in power consumption and area without requiring high sampling rate.Then,the important modules of the design are described in detail.Finally,the layout design and overall post simulation of the circuit are described.The main contents include the design and selection of DAC segmented capacitor array module,the selection of bandgap reference,reference buff and comparator structure,and the improvement of power consumption,etc.the design of the reference is modified to ensure that the error in the process of manufacturing can be finally modified,and the temporary bias current control is carried out for the reference buff and comparator to make it power-off or low-power operation when it is not working Breaking the limitation of low voltage and low power consumption design in the process of large minimum line width,it can meet the required voltage range,and the power consumption is 2 m W lower than the original requirement.Using the simulation software,the circuit design,pre simulation verification,layout design and post simulation verification are completed.The simulation results show that the working voltage meets the design requirements,the signal-to-noise ratio is above 72.9db,the effective bits are more than 11.5 under various conditions,the INL and DNL of segmented static simulation are less than 1lsb,and the overall layout area is 5.8mm~2.This design can be widely used in portable electronic products and instruments and other fields.