Resolution Enhancement Application Verification And Deflection Test Of High-speed And High-precision ADC

The high-speed and high-precision analog-to-digital converter(ADC)has become more and more prominent in the field of data acquisition.As an analog and digital signal conversion device,ADC performance and indicators play a decisive role in the overall function of the acquisition system.The higher the resolution of the ADC,the higher the accuracy of the conversion,and the stronger the ability to recognize tiny signals.As far as the current development of domestic integrated circuits is concerned,multiple ADCs with low quantization bits are used to improve the resolution of the system.It is also one of the key research contents.At the same time,since the development of domestic integrated circuits is later than abroad,the ability to effectively evaluate the performance of ADCs is also a popular direction for domestic integrated circuit research.This article focuses on improving the resolution of the system and efficiently testing ADC performance indicators under the worst environmental conditions.This paper designs the AD9690 application verification board and the AD9690 deflection test board based on the AD9690 analog-to-digital converter.Application verification is mainly designed for how to improve the resolution of the system.The improvement of the system resolution is based on the parallel sampling and summation method as the basic theory of the research.The main principle is to reduce the proportion of system noise,thereby increasing the signal-to-noise ratio to achieve the purpose of improving the system resolution and effective number of bits.In order to complete the ADC index test with high efficiency,this article designed a function to cover the environmental conditions specified in the manual,and use the programmable control method to simplify the test process.Realize the test of static index and dynamic index under the deflectioned condition.The main tasks completed in this paper are as follows:1.According to the requirements of the indicators,analyze the basic principles of resolution enhancement,and use 4 AD9690 chips to complete the design of the overall system resolution enhancement scheme according to the time synchronization parallel sampling and summation theory.According to the requirements of the AD9690 chip's pull-off conditions,the pull-off test plan is designed according to the functional division and modularization.2.Design the hardware circuit of the application verification system for resolution enhancement.The hardware design includes signal conditioning circuit,multi-ADC synchronization circuit and low jitter clock circuit.Logic design includes preprocessing and demapping of collected data based on JESD204 B interface,multi-ADC synchronization logic,and synchronization buffering of high-speed data streams.3.Completed the hardware circuit and logic design according to the functional requirements of the deflection test system.Including power supply voltage deflection,common mode voltage deflection,clock deflection,input signal deflection and voltage monitoring circuit design.4.Explain in detail the dynamic and static parameters of ADC and the common test methods of related indicators.A test platform was built to complete the improvement index of the system resolution and the index test of the ADC under the deflection condition under laboratory conditions.Through the design of the above research content.In this paper,the AD9690 chip is used to achieve the improvement of system resolution and the design of the deflection function specified by the index.The static and dynamic indexes are tested by the method of sine histogram and FFT respectively.There are slight differences between the test indexes and the manual indexes.