Design Of CMOS Quadrature Voltage Controlled Oscillator For WLAN 802.11b

Wireless local area network(WLAN)is the product of the combination of computer network and wireless communication technology.Its flexibility and mobility make WLAN develop rapidly in the fields of industry,medical treatment and military.As the development of wireless local area network,further requirements are placed on the performance of the RF transceiver chip.Reflected in the frequency synthesizer of the component modules of the RF transceiver chip,the frequency synthesizer is required to provide quadrature signals with high spectral purity and high matching degree at the same time with low power consumption.Therefore,Quadrature Voltage Controlled Oscillator(QVCO),as the core module of the frequency synthesizer,has great theoretical and engineering value for its research and design.The QVCO in this paper consists of two identical inductor-capacitor voltage-controlled oscillators coupled by an indirect substrate.PMOS transistors are used as buffers between the LC resonator and the back-gate diode to enhance the coupling strength.A single voltage-controlled oscillator uses a fully differential complementary cross-coupling structure,which can start oscillation at lower power consumption.The QVCO circuit uses a3-bit switched capacitor array to cover the frequency range,and a 3-bit tail resistor array is used to achieve process tuning.This design is based on the Cadence simulation platform and uses a 40 nm CMOS process.At process corner TT and temperature(-40/27/85 ° C),the post-simulation results are as follows: at the power supply voltage of 1.1V,the core operating current is less than 3m A,and the tuning range covers 2.4 ? 2.4835 GHz.The phase noise of 1MHz is better than-121 d Bc / Hz,and the output phase error is better than0.86°.The performance of the CMOS quadrature voltage-controlled oscillator designed meets the design index requirements,and it can be applied to WLAN RF transceiver chips.