Research And Design Of CMOS Image Sensor Interface Circuit

With the continuous improvement of spatial and temporal resolution of CMOS image sensor,the data volume of CMOS image sensor is increasing.At the same time,the demand for low power CMOS image sensor is increasing in modern society.Due to the technical limitations of traditional interface circuits,it is difficult to adapt to the requirements of CMOS image sensor for high-speed and low-power interface circuits.Low Voltage Differential Signaling(LVDS)circuit is an effective way to solve the problem of slow transmission rate,high power consumption and high noise in traditional interface circuit.Based on this,this paper studies and designs a LVDS circuit for CMOS image sensor.According to the limitation of area and power consumption of CMOS image sensor,a 1536:1 parallel-to-serial conversion circuit is designed in this paper,which combines pipelined and clock inverters.In order to guarantee the operation speed of LVDS driver circuit to reach 2Gbps,and reduce the power consumption and jitter of the circuit at the same time.In this paper,output swing rate control technology is used to achieve impedance matching,and the power consumption,jitter and area of LVDS drive circuit are reduced by using non-resistance common mode feedback circuit and multi-current source.At the same time,the pre-emphasis circuit parallel to the current switch driver switch is designed,which reduces the introduction of additional circuit and the power consumption and jitter of LVDS driver circuit.In this paper,the layout design of parallel-series conversion circuit and LVDS driver circuit is completed by using 0.13?m technology.The layout area of the parallel-series converter circuit is 704×320?m~2.The simulation results show that the total power consumption of the circuit is 1.4 m W at 500 Mbps.The layout area of LVDS driver circuit is 210×118 um 2.The simulation results show that the maximum power consumption of LVDS driver circuit is 23.43 m W at the rate of 2 Gbps at different process angles,power supply voltages and temperatures.At this time,the swing amplitude on the terminal resistance of 100?is 439 m V,the output common mode level is 1.26V and the jitter is 15.0 ps.